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 FDZ206P
January 2002
FDZ206P
P-Channel 2.5V Specified PowerTrench(R) BGA MOSFET
General Description
Combining Fairchild's advanced 2.5V specified PowerTrench process with state of the art BGA packaging, the FDZ206P minimizes both PCB space and RDS(ON). This BGA MOSFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low RDS(ON).
Features
* -13 A, -20 V. RDS(ON) = 9.5 m @ V GS = -4.5 V RDS(ON) = 14.5 m @ V GS = -2.5 V * Occupies only 14 mm2 of PCB area. Only 42% of the area of SO-8 * Ultra-thin package: less than 0.76 mm height when mounted to PCB * 0.65 mm ball pitch * 3.5 x 4 mm2 footprint * High power and current handling capability
Applications
* Battery management * Load switch * Battery protection
Pin 1 D D D D Pin 1 D D S S S G D S S S S D S S S S D S S S S D D D D D
S
F206P
G
D
Bottom
Top
TA=25oC unless otherwise noted
Absolute Maximum Ratings
Symbol
V DSS V GSS ID PD TJ , TSTG
Parameter
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous (Note 1a) - Pulsed Power Dissipation (Steady State) (Note 1a) Operating and Storage Junction Temperature Range
Ratings
-20 12 -13 -60 2.2 -55 to +150
Units
V V A W C
Thermal Characteristics
RJA RJB RJ C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ball Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1) (Note 1)
56 4.5 0.6
C/W
Package Marking and Ordering Information
Device Marking 206P Device FDZ206P Reel Size 13" Tape width 12mm Quantity 3000
(c)2002 Fairchild Semiconductor Corporation
FDZ206P Rev. D(W)
FDZ206P
Electrical Characteristics
Symbol
BV DSS BVDSS TJ IDSS IGSSF IGSSR V GS(th) VGS(th) TJ RDS(on)
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Forward Leakage Gate-Body Reverse Leakage
(Note 2)
Test Conditions
V GS = 0 V, ID = -250 A ID = -250 A, Referenced to 25C V DS = -16 V, V GS = -12 V, V GS = 12 V, V GS = 0 V V DS = 0 V V DS = 0 V
Min
-20
Typ
Max
Units
V mV/C
Off Characteristics
-13 -1 -100 100 -0.6 -0.9 3.3 7 10 9 -60 58 4280 873 400 17 11 115 60 38 7 10 31 20 184 96 53 -1.5
A nA nA V mV/C m
On Characteristics
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
V DS = V GS , ID = -250 A ID = -250 A, Referenced to 25C V GS = - 4.5 V, ID = -13 A V GS = -2.5 V, ID = -10.5 A V GS = -4.5 V, ID = -13 A, TJ =125C V GS = -4.5 V, V DS = -5 V V DS = -5 V, ID = -13 A V DS = -10 V, f = 1.0 MHz V GS = 0 V,
9.5 14.5 13
ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS V SD trr Qrr
Notes:
A S pF pF pF ns ns ns ns nC nC nC A V nS nC
Dynamic Characteristics
Switching Characteristics (Note 2)
V DD = -10 V, V GS = -4.5 V, ID = -1 A, RGEN = 6
V DS = -10 V, V GS = -4.5 V
ID = -13 A,
Drain-Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward V GS = 0 V, IS = -1.8 A Voltage Diode Reverse Recovery Time IF = -13A, Diode Reverse Recovery Charge diF/dt = 100 A/s
(Note 2)
-0.7 34 38
-1.8 -1.2
1. RJA is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to the circuit board side of the solder ball, RJB, is defined for reference. For RJC, the thermal reference point for the case is defined as the top surface of the copper chip carrier. RJC and RJB are guaranteed by design while RJA is determined by the user's board design.
a)
56C/W when mounted on a 1in2 pad of 2 oz copper
b)
119C/W when mounted on a minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDZ206P Rev. D (W)
FDZ206P
4.000.15 INDEX SLOT CL SOURCE GATE
0.30
CL
1 A 2 3 4 5 6
B
0.65 CL DRAIN 3.600.20
E C
D
2.60
0.65 2.60 TOP VIEW
LAND PATTERN RECOMMENDATION 0.25^0.15
0.76 MAX
SOLDER BALL, 0.300.03 SOLDER BALL CL 0.10 FRONT VIEW 0.30
E
2.60
D
0.51
BALL
C L
C
0.65
B
INDEX SLOT (HIDDEN)
A
SEATING PLANE 0.65 SIDE VIEW
1
2
3
4
5
6
GATE 3.25
NOTES: UNLESS OTHERWISE SPECIFIED A) ALL DIMENSIONS ARE IN MILLIMETERS. B) NO JEDEC REGISTRATION REFERENCE AS OF JULY 1999. C) BALL CONFIGURATION TABLE
BOTTOM VIEW
BALL TERMINAL A1,B1,C1,D1,E1,E2,E3, E4,E5,E6,D6,C6,B6,A6 A2 A3,A4,A5,B2,B3,B4,B5,C2, C3,C4,C5,D2,D3,D4,D5,
DESIGNATION DRAIN GATE SOURCE
FDZ206P Rev. D (W)
FDZ206P
Typical Characteristics
60 V GS =-4.5V 50 -ID , DRAIN CURRENT (A) -3.5V 40 -2.0V 30 -2.5V -3.0V RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE
1.8 V GS = -2.5V 1.6
1.4 -3.0V 1.2 -3.5V -4.0V 1 -4.5V
20 10
0 0 0.5 1 1.5 2 -V DS, DRAIN-SOURCE VOLTAGE (V)
0.8 0 10 20 30 40 50 60 -I D, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.03 RDS(ON) ON-RESISTANCE (OHM) ,
1.4 RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE ID = -13A VGS = -4.5V
ID = -6.5 A 0.025
1.3 1.2
0.02 TA = 125 oC 0.015
1.1 1
0.9 0.8 -50 -25 0 25 50 75 100 125 150 T J, JUNCTION TEMPERATURE ( oC)
0.01 TA = 25o C 0.005 1 2 3 4 5 -V GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
60 -IS, REVERSE DRAIN CURRENT (A) V DS = -5V 50 -ID , DRAIN CURRENT (A) 40 30 20 T A = -55o C 25oC 125o C
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 V GS = 0V 10 TA = 125o C 1 25oC 0.1 -55o C 0.01 0.001 0.0001
10 0 0.5 1 1.5 2 2.5 -V GS, GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDZ206P Rev. D (W)
FDZ206P
Typical Characteristics
5 -V GS, GATE-SOURCE VOLTAGE (V) ID = -13A 4 CAPACITANCE (pF) -15V 3 V DS = -5V -10V
6000 5000 CISS 4000
f = 1MHz VGS = 0 V
3000 2000 COSS 1000 CRSS
2
1
0 0 10 20 30 40 50 Qg, GATE CHARGE (nC)
0 0 5 10 15 20 -V DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 1ms 10ms R DS(ON) LIMIT -I D, DRAIN CURRENT (A) 10 1s 10s 1 DC V GS = -4.5V SINGLE PULSE RJA = 119o C/W TA = 25 oC 0.01 0.01 0.1 1 10 100 100ms P(pk), PEAK TRANSIENT POWER (W)
Figure 8. Capacitance Characteristics.
50 SINGLE PULSE RJA = 119C/W TA = 25C
40
30
20
0.1
10
0 0.01
0.1
1
10
100
1000
-V D S, DRAIN-SOURCE VOLTAGE (V)
t 1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02 0.01
RJA(t) = r(t) * RJA RJA = 119 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.01
0.001
SINGLE PULSE
0.0001 0.001 0.01 0.1 1
t1 , TIME (sec)
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
FDZ206P Rev. D (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4


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